This work explores the design of a novel integrated RF power amplifier in IBM’s 0.13 micron RF CMOS process. Through a combination of architectures, the series output transformer coupling of a distributed active transformer (DAT) topology is paired with a gain enhancing injection-locking architecture in an attempt to realize a combination of high output power, gain and efficiency; while minimizing die area and supply voltage. By employing this novel hybrid architecture, the proposed injection-locking DAT power amplifier achieves a P1dB of 25.94 dBm with a maximum gain of 14.5 dB and peak PAE of 22% from a 1.5 V dc supply voltage (in simulation). The measurement results show discrepancies from the simulated results provided, and several hypotheses as to the cause of these differences are explored.