Evaluation of High Level Synthesis Frameworks: Analysis Across Three Programming Paradigms

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  • High Level Synthesis (HLS) has played an important role in the design of high performance Field Programmable Gate Array (FPGA) based solutions and it is increasingly popular among developers. In this thesis, two HLS tools, Vivado HLS and Clash, supporting three programming language paradigms (imperative, transactionlevel modeling, and functional) are investigated. To assess the characteristics and performance of these HLS tools, we implement two trivial and non-trivial applications, Finite Impulse Response (FIR) filter and EigenValue Decomposition (EVD) with C++, SystemC and Clash. Pre-synthesis and post-synthesis results are elaborated to ensure each tool generates consistent outputs and simulation results are verified with the same program in MATLAB. It was found that Clash usually has better performance and latency as a result of the intrinsic parallelism feature of functional programming language Haskell. However, it was also found Vivado HLS has better results regarding power consumption and resource utilization, and provides more options for optimization of a design.

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  • Copyright © 2022 the author(s). Theses may be used for non-commercial research, educational, or related academic purposes only. Such uses include personal study, research, scholarship, and teaching. Theses may only be shared by linking to Carleton University Institutional Repository and no part may be used without proper attribution to the author. No part may be used for commercial purposes directly or indirectly via a for-profit platform; no adaptation or derivative works are permitted without consent from the copyright owner.
Date Created
  • 2022


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